Home‎ > ‎Multi-Media Card Reader‎ > ‎

MMC Software

MMC Software Design

During development I chose to use addresses FF7A-FF7B, however any set of two consecutive bytes can be used at any address via reprogramming the Atmel FPGA. The choice of these two address did not conflict with the address for FF70-FF78 of the IDE hard drive interface, so I was able to use a compact flash card as an ATA hard drive to speed OS-9 LII driver development.  During testing I was able to transfer large amounts of data from the Compact Flash card acting as an ATA device to the MMC and via-versa.  This enabled me to find and eliminate problems quickly with the driver code for the MMC.

Megaread speeds of 14 seconds are normal, however speeds could be increased by using newer faster MMCs (which I have yet to try).  Write speed is 1/3 as fast a reads due to lack of support from the MMC for 256 byte writes for a sector.  The process for a write to a sector involves first reading the correct 256 byte sector and then combining that data with the sector to be written and then writing the 512 byte sector back to the card.  Fortunately for this project the MMCs from Hitachi that I used during testing (16mb, 32mb and 64mb versions) support the ability to set a sector size from one byte to 2048 bytes.  This enabled the fast read speeds as only a single sector of 256 bytes is read for any read command.

The driver code for a read command has been greatly optimized.  The data read loop transfers 32 bytes per loop enabling a loop overhead of 8 (32 bytes * 8 loops).  The use of an 5 bit offset rather than incrementing the index register for each byte written to memory also saved valuable instruction time.  One timing issue with the interface is that 4 Color Computer clock cycles are required to transfer one SPI byte at high clock speed.  During an 8 bit register load instruction using an index register 4 cycles are used (3 for processing and one for memory read).  If consecutive reads are performed at the MMC Data port then data will be lost because 4 cycles must pass between each access.  By using the ldd instruction I was able to add in an extra cycle after the first register load giving me 4 cycles between reads to the data port (1 for reading register b and 3 to decode and execute the next load instruction for a total of 4 cycles).

Hot swapping is allowed, however OS-9 does not expect hard drives to be removable so changing MMCs while OS-9 is up and running is not too good of an idea.  If you remove one MMC and replace it with another MMC of the same size and format (as long as no drive activity is present) then you can swap cards reliably.  If you wish to swap cards from say a 16mb card to a 32mb card you will need to replace the cards and then reboot OS-9 (powering off the computer is not necessary).

For the future I would like to get OS-9 setup to boot from ROM and because all my floppys have been moved over to one MMC I can stop using the multi-pack interface, and floppy interface as well.  This would allow for a complete color computer with large amounts of storage and immediate booting of OS9 on power up with no magnetic media and elimination of dust problems, floppy data deteriation, and hard drive electronic/mechanical failures.


OS-9 screen shot with two MMC devices (H0 and H1)

Ĉ
Jim Hathaway,
Mar 12, 2009, 7:09 PM
ċ
h0_mmc_l1.dd
(0k)
Jim Hathaway,
Mar 12, 2009, 7:02 PM
Ĉ
Jim Hathaway,
Mar 12, 2009, 7:09 PM
Ĉ
Jim Hathaway,
Mar 12, 2009, 7:09 PM
ċ
mmcdrv.asm
(28k)
Jim Hathaway,
Mar 12, 2009, 7:02 PM
Ĉ
Jim Hathaway,
Mar 12, 2009, 7:09 PM
Ĉ
Jim Hathaway,
Mar 12, 2009, 7:09 PM
Comments