IDE/ATA Interface

Project History

Design

Back in 1995 I began working on an IDE interface for the coco. It seemed like a good and inexpensive way for any old 8 bit computer to have a hard drive. The idea was not all that complex in itself, after all IDE drives only require an interface. One of the largest problems to face was that IDE uses a 16 bit data bus. At first look of the specifications it seemed as though 8 bit transfers would be possible. As fate would have it, 8 bit transfers were only available if the IDE drive supported it (and only a few do!).

The Solution

It was now quite apparent that 16 bit transfers would need to be implemented. There are many ways to implement this technology, but I chose the least expensive route. By using two 8 bit latches (one for read and one for write) it is possible to capture the extra 8 bits that the CPU cannot see for each read or write to the data registers. All other IDE register only use 8 bits.

Functionality

By using an 8 bit latch for writing a sector, it is possible to fool the drive into seeing 16 bits for each cycle. First the upper 8 bits are written by the CPU to the write latch. During this write, the device does not see any change of state. The next step is for the CPU to write to the devices data register. When this register is accessed the latch is also enabled, sending 16 bits to the drive at one time. A read from the drive is done in reverse. First the CPU reads 8 bits from the drives data register, at the same time the read latch captures the extra 8 bits the CPU cannot access. This extra 8 bits is then read from the 'read' latch, and the cycle happens all over again.

Specifics

One more important thing to remember is that IDE drives have a sector size of 512 bytes. OS-9 from Tandy uses 256 byte sectors. The process of writing and reading a sector of 512 bytes could be seen as very inefficient to only return 256 bytes. By using a driver that only reads/writes to the drive register (bypassing the latches) a 256 byte sector is then created. Some may see this as wasteful, but the gain in speed seems like a logical choice to me. This is the way I implemented the first driver that I created. Using a Maxtor 210MB IDE drive I was able to format out to get 105MB. In the prototype the address range that the interface was set to use is (hex) $FF70-FF78. The first 8 bytes were the IDE drive registers while the 9th byte was used to map the latches.